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TrilithIC Data Sheet
1 1.1 * * * * * * * * * * * * * * * Overview Features
BTS 781 GP
Quad D-MOS switch Free configurable as bridge or quad-switch Optimized for DC motor management applications Low RDS ON: 26 m high-side switch, 14 m low-side switch (typical values @ 25 C) Maximum peak current: typ. 42 A @ 25 C= Very low quiescent current: typ. 4 A @ 25 C= Small outline, thermal optimized PowerPak Load and GND-short-circuit-protection Operates up to 40 V Status flag for over temperature Open load detection in Off-mode Overtemperature shut down with hysteresis Internal clamp diodes Isolated sources for external current sensing Under-voltage detection with hysteresis Ordering Code Q67006-A9526
P-TO263-15-1
Type BTS 781 GP 1.2 Description
Package P-TO263-15-1
The BTS 781 GP is part of the TrilithIC family containing three dies in one package: One double high-side switch and two low-side switches. The drains of these three vertical DMOS chips are mounted on separated leadframes. The sources are connected to individual pins, so the BTS 781 GP can be used in H-bridge- as well as in any other configuration. The double high-side is manufactured in SMART SIPMOS(R) technology which combines low RDS ON vertical DMOS power stages with CMOS control circuit. The high-side switch is fully protected and contains the control and diagnosis circuit. To achieve low RDS ON and fast switching performance, the low-side switches are manufactured in S-FET 2 logic level technology. The equivalent standard product is the SPD30N06S2L-13.
Data Sheet
1
2002-06-28
BTS 781 GP
1.3
Pin Configuration (top view)
Molding Compound NC SL1 IL1 NC IH1 ST1 SH1 DHVS GND IH2 ST2 SH2 SL2 NC IL2 1 Heat-Slug 1 2 18 3 4 5 Heat-Slug 2 6 7 8 9 10 11 12 Heat-Slug 3 13 16 14 15 DL2 17 DHVS DL1
Figure 1
Data Sheet
2
2002-06-28
BTS 781 GP
1.4 Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Pin Definitions and Functions Symbol NC SL1 IL1 NC IH1 ST1 SH1 DHVS GND IH2 ST2 SH2 SL2 NC IL2 DL2 DHVS DL1 Function Not connected Source of low-side switch 1 Analog input of low-side switch 1 Not connected Digital input of high-side switch 1 Status of high-side switch 1; open Drain output Source of high-side switch 1 Drain of high-side switches and power supply voltage Ground of high-side switches Digital input of high-side switch 2 Status of high-side switch 2; open Drain output Source of high-side switch 2 Source of low-side switch 2 Not connected Analog input of low-side switch 2 Drain of low-side switch 2 Heat-Slug 3 Drain of high-side switches and power supply voltage Heat-Slug 2 Drain of low-side switch 1 Heat-Slug 1
Pins written in bold type need power wiring.
Data Sheet
3
2002-06-28
BTS 781 GP
1.5
Functional Block Diagram
DHVS
6 8, 17
ST1
ST2
11
Diagnosis
Biasing and Protection
IH1
5
IH2 GND
10
Driver IN OUT 00LL 01LH 10HL 11HH
RO1
RO2
16
12
SH2 DL2
9
7 18
SH1 DL1
3
IL1
15
IL2
2
13
SL1
SL2
Figure 2 Block Diagram
Data Sheet
4
2002-06-28
BTS 781 GP
1.6
Circuit Description
Input Circuit The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs are protected by ESD clamp-diodes. The inputs IL1 and IL2 are connected to the gates of the standard N-channel vertical power-MOS-FETs. Output Stages The output stages consist of a low RDS ON Power-MOS H-bridge. In H-bridge configuration, the D-MOS body diodes can be used for freewheeling when commutating inductive loads. If the high-side switches are used as single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by integrated power clamp diodes. Short Circuit Protection The outputs are protected against - output short circuit to ground - overload (load short circuit). An internal OP-amp controls the Drain-Source-voltage by comparing the DS-voltagedrop with an internal reference voltage. Above this trippoint the OP-Amp reduces the output current depending on the junction temperature and the drop voltage. In the case of overloaded high-side switches the status output is set to low. Overtemperature Protection The high-side switches incorporate an overtemperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low. Undervoltage-Lockout (UVLO) When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis. The high-side output transistors are switched off if the supply voltage VS drops below the switch off value VUVOFF.
Open Load Detection
Open load is detected by voltage measurement in off state. If the output voltage exceeds a specified level the error flag is set with a delay.
Data Sheet 5 2002-06-28
BTS 781 GP
Status Flag The two status flag outputs are an open drain output with Zener-diode which require a pull-up resistor, c.f. the application circuit on page 15. ST1 and ST2 provide separate diagnosis for each high-side switch. Various errors as listed in the table "Diagnosis" are detected by switching the open drain output ST1/2 to low. Forward current in the integrated body diode of the highside switch may cause undefined voltage levels at the corresponding status output. The open load detection can be used to detect a short to Vs as long as both lowside switches are off and ROL is disconnected from 5V by BCR192W. 2 Flag Truthtable and Diagnosis (valid only for the High-Side-Switches) IH1
0 0 1 1 0 1 X X
IH2
0 1 0 1 X X 0 1 X X 0 1 0 1 X X
SH1
L L H H Z H X X L L X X L L L L
SH2
L H L H X X Z H X X L L L L L L
ST1 ST2 Remarks
1 1 1 1 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 0 1 0 1 1 stand-by mode switch2 active switch1 active both switches active detected detected
Inputs
Normal operation; identical with functional truth table
Outputs
Open load at high-side switch 1 Open load at high-side switch 2
Overtemperature high-side switch1 0 1 Overtemperature high-side switch2 X X Overtemperature both high-side switches Undervoltage 0 X 1 X
detected detected detected detected not detected
Note: * multiple simultaneous errors are not shown in this table
Inputs: 0 = Logic LOW 1 = Logic HIGH X = don't care
Outputs: Z = Output in tristate condition L = Output in sink condition H = Output in source condition X = Voltage level undefined
Status: 1 = No error 0 = Error
Data Sheet
6
2002-06-28
BTS 781 GP
3 3.1
Electrical Characteristics Absolute Maximum Ratings - 40 C < Tj < 150 C Symbol Limit Values min. max. Unit Remarks
Parameter
High-Side-Switches (Pins DHVS, IH1,2 and SH1,2) Supply voltage Supply voltage for full short circuit protection HS-drain current HS-input current HS-input voltage Note: * internally limited Status Output ST (Pins ST1 and ST2) Status pull up voltage Status Output current
VS VS(SCP) IS IIH VIH
- 0.3
42 28
V V A mA V
- -
- 10 -5 - 10
* 5 16
TC = 125C; DC
Pin IH1 and IH2 Pin IH1 and IH2
VST IST
- 0.3 -5
5.4 5
V mA
- Pin ST1 or ST2
Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2) Drain- source break down voltage LS-drain current LS-drain current TC = 85C LS-input voltage Temperatures Junction temperature Storage temperature
VDSL IDL IDL VIL
55 -20 - - - 20
- 20 25 100 20
V A A A V
VIL = 0 V; ID 1 mA TC = 125C; DC tp < 100 ms; < 0.1 tp < 1 ms; < 0.1
Pin IL1 and IL2
Tj Tstg
- 40 - 55
150 150
C C
- -
Data Sheet
7
2002-06-28
BTS 781 GP
3.1
Absolute Maximum Ratings (cont'd) - 40 C < Tj < 150 C Symbol Limit Values min. max. Unit Remarks
Parameter
Thermal Resistances (one HS-LS-Path active) LS-junction case HS-junction case Junction ambient Rthja = Tj(HS)/(P(HS)+P(LS))
RthjC L RthjC H Rthja
- - -
0.6 0.75 35
K/W K/W K/W device soldered to reference PCB with 6 cm2 cooling area
ESD Protection (Human Body Model acc. MIL STD 883D, method 3015.7 and EOS/ ESD assn. standard S5.1 - 1993) Input LS-Switch Input HS-Switch Status HS-Switch Output LS and HS-Switch
VESD VESD VESD VESD
0.5 1 2 4
kV kV kV kV all other pins connected to Ground
Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. 3.2 Operating Range - 40 C < Tj < 150 C Symbol Limit Values min. Supply voltage Input voltages HS Input voltages LS Status output current Junction temperature max. V V V mA C After VS rising above VUVON - - - - Unit Remarks
Parameter
VS VIH VIL IST TjHS
VUVOFF 42
- 0.3 - 0.3 0 - 40 15 20 2 150
Note: In the operating range the functions given in the circuit description are fulfilled.
Data Sheet
8
2002-06-28
BTS 781 GP
3.3
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified
Parameter Symb ol Limit Values min. typ. max. Unit Test Condition
Current Consumption HS-switch Quiescent current
IS Q
- -
4 - 2.5 5 - 2.2
9 20 4.5 9 7 10
A A mA mA A mA
IH1 = IH2 = 0 V Tj = 85 C IH1 = IH2 = 0 V IH1 or IH2 = 5 V IH1 and IH2 = 5 V
Supply current Leakage current of highside switch Leakage current through logic GND in free wheeling condition
IS ISH LK
- - -
ILKCL = - IFH + ISH
VIH = VSH = 0 V Tj = 85 C IFH =5 A
Current Consumption LS-switch Input current Leakage current of lowside switch
IIL IDL LK
- -
10 -
100 12
nA A
VIL = 20 V VDSL = 0 V VIL = 0 V VDSL = 40 V Tj = 85 C
Under Voltage Lockout (UVLO) HS-switch Switch-ON voltage Switch-OFF voltage Switch ON/OFF hysteresis
VUVON VUVOFF VUVHY
- 1.8 -
- - 1
5 4.5 -
V V V
VS increasing VS decreasing VUVON - VUVOFF
Data Sheet
9
2002-06-28
BTS 781 GP
3.3
Electrical Characteristics (cont'd)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified
Parameter Symb ol Limit Values min. typ. max. Unit Test Condition
Output stages Inverse diode of highside switch; Forwardvoltage Inverse diode of lowside switch; Forward-voltage
VFH
-
0.8
1.2
V
IFH = 5 A
VFL
-
0.8 26
1.2 35
V m
IFL = 5 A ISH = 5 A Tj = 25 C ISL = 5 A; VIL = 5 V Tj = 25 C RDS ON H + RDS ON L ISH = 5 A;
RDS ON H - Static drain-source on-resistance of highside switch
Static drain-source on-resistance of lowside switch
RDS ON L -
14
17
m
Static path on-resistance RDS ON
-
-
100
m
Short Circuit of highside switch to GND Initial peak SC current Initial peak SC current Initial peak SC current
ISCP H ISCP H ISCP H
35 30 25
48 42 32
65 54 42
A A A
Tj = - 40 C Tj = + 25 C Tj = + 150 C
Note: Peak SC current is significantly lower at VS > 18V Short Circuit of highside switch to VS Output pull-down-resistor RO 7 14 42 k
VDSL = 3 V
Data Sheet
10
2002-06-28
BTS 781 GP
3.3
Electrical Characteristics (cont'd)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified
Parameter Symb ol Limit Values min. typ. max. Unit Test Condition
Thermal Shutdown Thermal shutdown junction temperature Thermal switch-on junction temperature Temperature hysteresis
Tj SD Tj SO
T
155 150 -
180 170 10
190 180 -
C C C
- - T = TjSD - TjSO
Status Flag Output ST of highside switch Low output voltage Leakage current Zener-limit-voltage Status change after positive input slope with open load
VST L IST LK VST Z td(SToffo+)
- - 5.4 -
0.2 - -
0.6 5 - 20
V A V s
IST = 1.6 mA VST = 5 V IST = 1.6 mA
Status change after td(SToffo-) - negative input slope with open load Status change after positive input slope with overtemperature
-
700
s
td(STofft+) -
1.6
10
s
RST = 47 k
Status change after td(STofft-) negative input slope with overtemperature
-
14
100
s
RST = 47 k
Note: times are guaranteed by design Open load detection in Off condition Open load detection voltage
VOUT(OL) 2
3
4
V
Data Sheet
11
2002-06-28
BTS 781 GP
3.3
Electrical Characteristics (cont'd)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified
Parameter Symb ol Limit Values min. typ. max. Unit Test Condition
Switching times of highside switch Turn-ON-time; to 90% VSH Turn-OFF-time; to 10% VSH Slew rate on 10 to 30%
tON tOFF
- - - -
100 120 0.5 0.7
220 250 1.1 1.3
s s
RLoad = 12 VS = 12 V RLoad = 12 VS = 12 V
dV/ dtON VSH Slew rate off 70 to 40% -dV/ dtOFF VSH
V/s RLoad = 12 VS = 12 V V/s RLoad = 12 VS = 12 V
Note: switching times are guaranteed by design Switching times of low-side switch Turn-ON delay time; VIL = 5V; RGate= 16 Switch-ON time; VIL= 5V; RGate = 16 Switch-OFF delay time; VIL= 5V; RGate = 16 Switch-OFF time; VIL= 5V; RGate = 16 Input to source charge; Input to drain charge; Input charge total; Input plateau voltage;
td_ON_L tON_L
- -
40 170 100 200 4.5 16 55 2.6 6 24 69 -
ns ns ns ns nC nC nC V
resistive load ISL = 10 A; VS = 12 V resistive load ISL = 10 A; VS = 12 V resistive load ISL = 10 A; VS = 12 V resistive load ISL = 10 A; VS = 12 V
td_OFF_L - tOFF_L QIS QID QI
- - - -
V(plateau) -
ISL = 10 A; VS = 40 V ISL = 10 A; VS = 40 V ISL = 10 A; VS = 40 V VIL = 0 to 10 V ISL = 10 A; VS = 40 V
Note: switching times and input charges are guaranteed by design
Data Sheet
12
2002-06-28
BTS 781 GP
3.3
Electrical Characteristics (cont'd)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified
Parameter Symb ol Limit Values min. typ. max. Unit Test Condition
Control Inputs of highside switches IH 1, 2 H-input voltage L-input voltage Input voltage hysterese H-input current L-input current Input series resistance Zener limit voltage Control Inputs IL1, 2 Gate-threshold-voltage IDL = 1 mA
VIH High VIH Low VIH HY IIH High IIH Low RI VIH Z
- 1 - 5 5 2.7 5.4
- - 0.5 30 14 4 -
2.5 - - 60 25 6 -
V V V A A k V
- - -
VIH = 5 V VIH = 0.4 V
-
IIH = 1.6 mA
VIL th
- - 0.8
1.9 1.7 1.1
2.6 - -
V
Tj = - 40 C Tj = + 25 C Tj = + 150 C
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 C and VS = 12 V.
Data Sheet
13
2002-06-28
BTS 781 GP
IS
VS CS 470nF CL 100F
IFH1,2 IST LK1 IST1 ST1
6
DHVS
8, 17
VDSH2 IST LK2 IST2 VST1 VSTL1 VSTZ1 VST2 VSTL2 VSTZ2 VIH1 VIH2 IIH1 IH2 GND IGND ILKCL
10
VDSH1 -VFH1
-VFH2 ST2
11
Diagnosis
Biasing and Protection
IIH1
IH1
5
Gate Driver RO1 Gate Driver RO2
16 12
SH2 DL2
ISH2 IDL2 IDL LK 2 VUVON VUVOFF
6
7 18
SH1 DL1
ISH1 IDL1 IDL LK 1
IIL1
IL1
3
VIL1 VIL th 1
IIL2
IL2
15
VIL2 VIL th 2
2
13
VDSL1 -VFL1
VDSL2 -VFL2
SL1 ISCP L 1 ISL1
SL2 ISCP L 2 ISL2
Figure 3 Test Circuit HS-Source-Current Named during Short Circuit Named during LeakageCond.
ISH1,2
ISCP H
IDL LK
Data Sheet
14
2002-06-28
BTS 781 GP
Watchdog Reset Q RQ 100 k
TLE 4278G
D CD 47nF
I
VS=12V
RQ 100 k
CQ 22F
D01 Z39
CS 10F
WD R
VCC RS 10 k
ST1
6
DHVS
8, 17
BCR192W Can be replaced by diode when Short to Vs detection is not needed ROL 560Ohm
to C RS 10 k ST2 11 Diagnosis Biasing and Protection
IH1
5
Gate Driver RO1 RO2
16 12
optional for open load in off SH2 DL2
IH2 GND P
10
Gate Driver
9
7 18
SH1 DL1
M
IL1
3
IL2
15
2
13
GND
SL1
SL2
Figure 4 Application Circuit
Data Sheet 15 2002-06-28
BTS 781 GP
4
Package Outlines P-TO263-15-1 (Plastic Transistor Single
21.6 0.2 8.3 X2, 1) 5.56 0.15 10.2 8.18 0.15 4.8 X1, 1) 1.27 0.1 B 0.1 2.4
1)
4.4
9.25 0.2
10.3
A
0.05
(15)
7.65
14 x 1.4
0...0.15 0.8 0.1
4.7 0.5
2.7 0.3
0.5 0.1
8 MAX.
0.25
1)
M
AB
0.1 B
Typical Metal surface min. X1 = 3.57, X2 = 7.03, Y = 6.9 All metal surfaces tin plated, except area of cut.
Footprint Footprint
21.6 0.8 8.4
16
9.5
0.4
1
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Data Sheet 16
4
Dimensions in mm 2002-06-28
BTS 781 GP
Published by Infineon Technologies AG, Bereichs Kommunikation St.-Martin-Strasse 53, D-81541 Munchen (c) Infineon Technologies AG 1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Data Sheet
17
2002-06-28

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